1. Field of the Invention
The present invention relates to a test system for testing characteristics of semiconductor devices and to a semiconductor device insertion and extraction station and a test chamber used for such a test system.
2. Description of the Related Art
A conventional test handler is shown in FIG. 10. The test handler has a tester station head 3 connected to a tester (not shown). Connected to the tester station head 3 is a test handler board 4 provided with a plurality of contactors. A locating press mechanism 6 is arranged above the test handler board 4 to connect a plurality of semiconductor devices 2 mounted on a tray 1 to corresponding respective contactors 5. The test handler is also provided with transfer means for transferring the tray 1, a preheat section 8 for preheating the semiconductor devices 2 before testing and a grouping section 7 for grouping the tested semiconductor devices 2 into non-defective and defective products.
After the semiconductor devices 2 are preheated to a predetermined test temperature while remaining on the tray 1, they are transferred immediately above the test handler board 4. Then, each of the semiconductors 2 is pressed against a corresponding contactor 5 by the locating press mechanism 6 and electrically connected to the station head 3 via the contactor 5 and the test handler board 4. In such a state, the electrical characteristics test is simultaneously performed by the tester (not shown) on a plurality of semiconductor devices 2 mounted on the tray 1.
After the completion of the test on the semiconductor devices 2 as described above, the locating press mechanism 6 is raised and the tray 1 placed immediately above the test handler board 4 is fed to the grouping section 7. The subsequent tray 1 which has been preheated in the preheat section 8 replacing the preceding tray is transferred immediately above the test handler board 4, and similarly, the test is performed on the semiconductor devices 2. The semiconductor devices 2 mounted on the tray 1 transferred to the grouping section 7 are grouped into non-defective and defective products according to the test results.
As described above, since the plurality of semiconductor devices 2 mounted on the tray 1 are simultaneously tested, efficient testing can be performed by the conventional test handler particularly when testing a large number of a single type of device in which each of the devices requires a short test time.
However, the conventional test handler presents the following problems. Along with the recent trend moving toward high density semiconductor devices and complicated circuits, the time required for testing a single semiconductor device becomes longer. There is also a trend in producing many types of semiconductor devices of varying the production quantity according to the type of semiconductor device. Thus, the operation efficiency of expensive mechanisms, such as the locating press mechanism 6, and the like, are lowered, and also, the test handler boards 4 and the locating press mechanisms 6 have to be frequently exchanged to correspond to the type of device and package.
Further, since the transfer means (not shown) horizontally transfers the tray 1, the test handler requires a large floor area, thus lowering space use efficiency.